For designing and manufacturing semiconductor devices, it is desirable to relate process parameters to yield. However, there are currently no metrics that allow for a direct comparison between process parameters and yield. Currently used metrics require inscribing an ellipse into a given process window, which is computationally expensive, requires iterations, and may result in multiple candidate solutions. It is desirable to develop metrics without such complicated calculations. Even further, it is desirable to develop metrics that relate maximizing yield to minimizing cost associated with the manufacture of semiconductor devices, such as cost associated with lithography process steps.
A need therefore exists for a method and apparatus for providing a metric that directly relates lithography process parameters to yield.